Cypress S6J3200 Series, Manual

Page: 256 / 1355

CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 255
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"Outside range": The flags are set if the A/D result is below the lower OR above the upper threshold
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"Inside range": The flags are set if the A/D result is above the lower AND below the upper threshold

The results of the range comparator can be filtered to ignore short spikes

During an active A/D conversion, it can be forced stop by software

It is possible to select the operation after A/D conversion finished (and next conversion is not requested)
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A/D converter goes to idle (power-down) state after A/D conversion finished
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A/D converter does not go idle (power-down) state, it can start A/D sampling without the resumption
time
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Interrupt request generation to CPU is provided for:
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Conversion done interrupt (end of a logical channel conversion)
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Group interrupted interrupt (a group processing is interrupted just before the logical channel
conversion is to be started or in case of multiple conversion channel before the last conversion is
started)
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Range comparison interrupt
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Pulse detection interrupt
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Conversion done interrupts of up to four logical channels can trigger DMA requests to transfer the A/D
conversion results to memory. The conversion done interrupts of the group last logical channels are
good candidates for DMA burst setup, since the group result registers can be read linearly

Debug mode provides the possibility to freeze further A/D conversion processing at the end of the
current conversion