Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 767
4.110.
Design Configuration 5 Register
(ETHERNETn_designcfg_debug5)
Description of Design Configuration 5 register is shown.
REGISTER_NAME ETHERNETn_designcfg_debug5
OFFSET 0x290
ACCESS_SIZE W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME axi_prot_value tsu_clk rx_buffer_length_def[7:4]
ACCESS_TYPE R,WX R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x2 0 0xF
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME rx_buffer_length_def[3:0]
tx_pbuf_siz
e_def
rx_pbuf_size_def
endian_swa
p_def[1]
ACCESS_TYPE R,WX R,WX R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x0 1 0x3 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME endian_swap_def[0] mdc_clock_div dma_bus_width_def phy_ident tsu
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE 0 0x2 0x1 0 1
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME tx_fifo_cnt_width rx_fifo_cnt_width
ACCESS_TYPE R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x4 0x4
[bit31:29] axi_prot_value:
Takes the value of `gem_axi_prot_value. Writing has no effect.
[bit28] tsu_clk:
Takes the value of `gem_tsu_clk. Writing has no effect.
[bit27:20] rx_buffer_length_def:
Takes the value of `gem_rx_buffer_length_def. Writing has no effect.