Cypress S6J3200 Series, Manual

Page: 263 / 1355

CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
262 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
Figure 3-3 Example of Logical Channel Priority Configuration
The example on Figure 3-3 would result in following priority arbitration and corresponding logical channel
conversion sequence:
(1) Logical channel 4.
Logical channel 0 has higher priority, but its data protection function is active.
(2) Logical channel 58.
This logical channel has the same priority as logical channel 4, but it is converted as second since its
number is higher.
(3) Logical channel 60.
Although the channel 59 has higher priority, its trigger status is not set and even the data protection is
active. Moreover, logical channel 6 has the same priority and even lower number, but its trigger status is
not set.
(4) Logical channel 7.
Even though the logical channels 3 and 5 have higher priority, their trigger status is not set.
(5) Logical channel 1.
(6) Logical channel 2.
(7) Logical channel 61.
(8) Logical channel 62.
It has lower number then the channel 63.
(9) Logical channel 63.
Logical channel number
CHPRI bit field setting
Trigger status flag
Data protection function
0 1 2 3 4 5 6 7
...
58 59 60 61 62 63
0 12 13 5 1 6 3 10
...
1 2 3 14 15 15
...
1 0 0 0 0 0 0 0 0 1 0 0 0 0
...
1 1 1 0 1 0 0 1 1 0 1 1 1 1