Cypress S6J3200 Series, Manual

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CHAPTER 26:PCMPWM
1002 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
[bit3] DMA_ERR : DMA Block Error
This status bit reflects if a DMA block error has occurred.
Bit Description
0 No error
1
A DMA block error has occurred, i.e. there were more data transfers to the FIFO buffer than specified
by PCMPWMi_CONTROL:FEST + 1
[bit2] UDRN : FIFO Under-Run Error
This status bit reflects if a FIFO buffer under-run has occurred.
Bit Description
0 No error
1
A FIFO buffer under-run has occurred, i.e. the PCM to PWM conversion block tried to read another PCM
data sample, but the FIFO buffer is empty
[bit1] OVFL : FIFO Overflow Error
This status bit reflects if a FIFO buffer overflow has occurred.
Bit Description
0 No error
1
A FIFO buffer overflow has occurred, i.e. there was a write access to the FIFO buffer when there was no
more space available
[bit0] DREQ : Data Request
This status bit reflects if there is space for another n PCM data samples in the FIFO buffer. The number
n is defined by PCMPWMi_CONTROL:FEST + 1.
Bit Description
0
No data request: There are less than PCMPWMi_CONTROL:FEST + 1empty entries available in the
FIFO buffer
1
Data request: There are PCMPWMi_CONTROL:FEST + 1 or more empty entries available in the FIFO
buffer