Cypress S6J3200 Series, Manual

Page: 344 / 1355

CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 343
5.19.
A/D Channel Trigger Overrun Flag Registers (ADC12Bn_TRGOR0
to 1)
A/D Channel Trigger Overrun Flag Registers ADC12Bn_TRGOR0 to 1 register the possible trials to set
already active (set to "1") trigger status for all 64 logical channels.
REGISTER_NAME ADC12Bn_TRGORi (i = 0 to 1)
OFFSET i*4
ACCESS_SIZE B H W
MULTIPLE 0:1
NUMERIC_TYPE
-
OTHER
-
5.19.1.
A/D Channel Trigger Overrun Flag Register (ADC12Bn_TRGOR0)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME TRGOR31 TRGOR30 TRGOR29 TRGOR28 TRGOR27 TRGOR26 TRGOR25 TRGOR24
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME TRGOR23 TRGOR22 TRGOR21 TRGOR20 TRGOR19 TRGOR18 TRGOR17 TRGOR16
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME TRGOR15 TRGOR14 TRGOR13 TRGOR12 TRGOR11 TRGOR10 TRGOR9 TRGOR8
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME TRGOR7 TRGOR6 TRGOR5 TRGOR4 TRGOR3 TRGOR2 TRGOR1 TRGOR0
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:0] TRGOR31 to 0 : A/D Channel Trigger Overrun flags
Bit Description
0 No trigger overrun happened
1 Trigger overrun occurred
This bit is set to "1" under following conditions:
−
Conversion request is issued although the corresponding trigger status bits
ADC12Bn_TRGST0.TRGST and ADC12Bn_CHSTAT0 to 31.TRGST are already set to "1"