CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
320
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
This bit is set under the following conditions:
−
The range comparison for this channel is enabled ADC12B_CHCTRL0 to 31.RCEN is set
−
The conversion of the logical channel is just finished
−
An interrupt condition is met (see Table 5-1)
This bit is cleared by writing "1" to the corresponding ADC12B_RCIRQC0.RCIRQC bit.
This bit is identical to the RCIRQ bit in the corresponding ADC12Bn_CHSTAT0 to 31 register.
Summary of Contents for S6J3200 Series
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