Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 769
4.111.
Design Configuration 6 Register
(ETHERNETn_designcfg_debug6)
Description of Design Configuration 6 register is shown.
REGISTER_NAME ETHERNETn_designcfg_debug6
OFFSET 0x294
ACCESS_SIZE W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME Reserved pbuf_cutthru pfc_multi_quantum
ACCESS_TYPE R0,WX R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE (product specification) 0 1
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME
dma_addr_
width_is_64
b
host_if_soft
_select
tx_add_fifo_
if
ext_tsu_tim
er
tx_pbuf_queue_segment_size
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE (product specification)
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME
dma_priorit
y_queue15 dma_priorit
y_queue14 dma_priorit
y_queue13 dma_priorit
y_queue12 dma_priorit
y_queue11
dma_priorit
y_queue10 dma_priorit
y_queue9
dma_priorit
y_queue8
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE (product specification)
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME
dma_priorit
y_queue7
dma_priorit
y_queue6
dma_priorit
y_queue5
dma_priorit
y_queue4
dma_priorit
y_queue3
dma_priorit
y_queue2
dma_priorit
y_queue1
Reserved
ACCESS_TYPE R,WX R,WX R,WX R,WX R,WX R,WX R,WX R0,WX
PROT_TYPE Wp
INITIAL_VALUE (product specification)
[bit31:26] Reserved:
Always read “0”. Writing has no effect.
[bit25] pbuf_cutthru:
Takes the value of `gem_pbuf_cutthru. Writing has no effect.