Cypress S6J3200 Series, Manual

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CHAPTER 22:Media Local Bus Interface (MediaLB)
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 873
4.15.
MediaLBn Channel Next Buffer Configuration Register
(MLBn_CNBCR0 - MLBn_CNBCR15)
The Channel n Next Buffer Configuration Register (MLBn_CNBCRn) configures the start and end
addresses of the Next Buffer in system memory for the logical channel when configured for DMA Mode.
When configured for IO Mode, the MLBn_CNBCRn registers is the Transmit Data Buffer. There are 16
such registers corresponding to 16 logical MediaLB channels. The definition of the bit fields in the
MLBn_CNBCRn register depend on the selected channel type.
REGISTER_NAME YOURPERIn_CSRi
OFFSET 0 + i*4
ACCESS_SIZE B H W
MULTIPLE 0:15
NUMERIC_TYPE
OTHER
MediaLBn Channel Next Buffer Configuration Register (MLBn_CNBCR0 -
MLBn_CNBCR15)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME BSA[15] BSA[14] BSA[13] BSA[12] BSA[11] BSA[10] BSA[9] BSA[8]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME BSA[7] BSA[6] BSA[5] BSA[4] BSA[3] BSA[2] BSA[1] BSA[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME BEA[15] BEA[14] BEA[13] BEA[12] BEA[11] BEA[10] BEA[9] BEA[8]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME BEA[7] BEA[6] BEA[5] BEA[4] BEA[3] BEA[2] BEA[1] BEA[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:16] BSA[15:0] : Buffer Start Address bits
This bit field has different interpretations for DMA mode and IO mode.
In DMA mode, the BSA field defines a 16-bit address pointer, which identifies the lower half of the