CHAPTER 21:Ethernet MAC
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
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[bit0] management_done_interrupt_mask
management done interrupt mask. A write to this register directly affects the state of the corresponding
bit in the interrupt status register, causing an interrupt to be generated if a 1 is written.
Bit
Description
0
Interrupt is enabled.
1
Interrupt is disabled.
Summary of Contents for S6J3200 Series
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