CHAPTER 24:Inter-IC Sound (I2S)
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
919
3.4.
FIFO Construction
Figure 3-5 Simultaneous Transfer Mode Data Flow
When I2Sn_CNTREG:TXDIS = "0" and I2Sn_CNTREG:RXDIS = "0", the mode is set to simultaneous
transfer mode which operates with 66-word x 32-bit transmission and reception FIFOs.
FIFO
To transmssion pin
From reception pin
SWITCH
W
R
W
R
To I2Sn_RXFDAT0~15 register
From I2Sn_TXFDAT0~15 register
I2Sn_CNTREG:TXDIS =
’0’ and I2Sn_CNTREG:RXDIS = ’0’
66 words X 32 bits
66 words X 32 bits
Summary of Contents for S6J3200 Series
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