Cypress S6J3200 Series, Manual

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CHAPTER 22:Media Local Bus Interface (MediaLB)
860 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.11.
MediaLBn AHB Master Control Register (MLBn_AHBMCTL)
MediaLBn AHB Master Control Register (MLBn_AHBMCTL) controls the AHB Bus Request from
MediaLB Master.
REGISTER_NAME YOURPERIn_CSRi
OFFSET 0 + i*4
ACCESS_SIZE B H W
MULTIPLE 0:15
NUMERIC_TYPE
OTHER
MediaLB AHB Master Control Register (MLBn_AHBMCTL)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME
MAXTRANS[
15]
MAXTRANS[
14]
MAXTRANS[
13]
MAXTRANS[
12]
MAXTRANS[
11]
MAXTRANS[
10]
MAXTRANS[
9]
MAXTRANS[
8]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME
MAXTRANS[
7]
MAXTRANS[
6]
MAXTRANS[
5]
MAXTRANS[
4]
MAXTRANS[
3]
MAXTRANS[
2]
MAXTRANS[
1]
MAXTRANS[
0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME
MCYCNONR
EQ[15]
MCYCNONR
EQ[14]
MCYCNONR
EQ[13]
MCYCNONR
EQ[12]
MCYCNONR
EQ[11]
MCYCNONR
EQ[10]
MCYCNONR
EQ[9]
MCYCNONR
EQ[8]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME
MCYCNONR
EQ[7]
MCYCNONR
EQ[6]
MCYCNONR
EQ[5]
MCYCNONR
EQ[4]
MCYCNONR
EQ[3]
MCYCNONR
EQ[2]
MCYCNONR
EQ[1]
MCYCNONR
EQ[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:16] MAXTRANS[15:0]
Always write "0" to this register. Read value is "X".
[bit15:0] MCYCNONREQ[15:0]
Always write "0" to this register. Read value is "X".