CHAPTER 18:Sound Generator
458
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.10.
Interrupt Clear Register (SGCCR)
The Interrupt Clear Register (SGCCR) clears the Interrupt status bit (SGCR.INT) in the Sound Control
Register (SGCR).
bit
15
14
13
12
11
10
9
8
Field
Reserved
Attribute
-
Initial value
0x00
bit
7
6
5
4
3
2
1
0
Field
Reserved
INTC
Reserved
Attribute
-
W
-
Initial value
0x00
0
0
Note:
−
Use 16- or 32-bit data access for the SGCCR register.
[bit15:2] Reserved : Reserved bits
Always write "0" to these bits. The read value is "0".
[bit1] INTC : Interrupt status clear bit
When this bit is set, Interrupt status bit (SGCR.INT) is cleared.
The read value is "0".
Bit
Description
Write
0
No effect.
1
Interrupt status bit (SGCR.INT) is cleared.
[bit0] Reserved : Reserved bit
Always write "0" to this bit. The read value is "0".
Summary of Contents for S6J3200 Series
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