Cypress S6J3200 Series, Manual

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CHAPTER 31:Memory Protection Unit for AXI
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 1151
4.4.
MPU AXI Write Error Address Register (MPUXn_WERRA)
This is a read-only register that provides the software the write address of AXI transaction on AXI master
write address channel interface for which memory protection violation was detected.
 MPUXn_WERRA
MPUXn_WERRA
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
A
W
A
D
D
R
[3
1]
A
W
A
D
D
R
[3
0]
A
W
A
D
D
R
[2
9]
A
W
A
D
D
R
[2
8]
A
W
A
D
D
R
[2
7]
A
W
A
D
D
R
[2
6]
A
W
A
D
D
R
[2
5]
A
W
A
D
D
R
[2
4]
A
W
A
D
D
R
[2
3]
A
W
A
D
D
R
[2
2]
A
W
A
D
D
R
[2
1]
A
W
A
D
D
R
[2
0]
A
W
A
D
D
R
[1
9]
A
W
A
D
D
R
[1
8]
A
W
A
D
D
R
[1
7]
A
W
A
D
D
R
[1
6]
A
W
A
D
D
R
[1
5]
A
W
A
D
D
R
[1
4]
A
W
A
D
D
R
[1
3]
A
W
A
D
D
R
[1
2]
A
W
A
D
D
R
[1
1]
A
W
A
D
D
R
[1
0]
A
W
A
D
D
R
[9
]
A
W
A
D
D
R
[8
]
A
W
A
D
D
R
[7
]
A
W
A
D
D
R
[6
]
A
W
A
D
D
R
[5
]
A
W
A
D
D
R
[4
]
A
W
A
D
D
R
[3
]
A
W
A
D
D
R
[2
]
A
W
A
D
D
R
[1
]
A
W
A
D
D
R
[0
]
R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R R
X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X
Bit Position Bit Field Name Bit Description
[31:0] AWADDR
AXI Write Address
Write address of AXI transaction for which memory protection violation is
detected.