Cypress S6J3200 Series, Manual

Page: 447 / 1355

CHAPTER 18:Sound Generator
446 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.2.
Sound Control Register (SGCR)
The Sound Control Register (SGCR) is to control interrupts and operation status of the Sound Generator.
bit 15 14 13 12 11 10 9 8
Field Reserved SRST DMA GID GEN Reserved BUSY Reserved
Attribute
-
W R/W R/W R/W
-
R
-
Initial value 0 0 0 0 0 0 0 0
bit 7 6 5 4 3 2 1 0
Field S1 S0 TONE SGOOE SGAOE INTE INT ST
Attribute R/W R/W R/W R/W R/W R/W R R/W
Initial value 0 0 0 0 0 0 0 0
[bit15] Reserved : Reserved bit
Always write "0" to this bit. The read value is "0".
[bit14] SRST : Software reset bit
This bit is used to issue a software reset in the Sound Generator.
When in the read access, the read value is always "0". Writing "0" to this bit has no effect.
Bit
Description
Write
0 No effect.
1 Writing "1" issues a software reset.
[bit13] DMA : DMA transfer start interrupt setting enable bit
This bit is to enable DMA transfer start interrupt.
Bit Description
0 Writing "1" to the Start bit (ST) does not make the Interrupt status bit (INT) set.
1 Writing "1" to the Start bit (ST) makes the Interrupt status bit (INT) set.
Note:
−
Do not change this setting while operating (ST="1").