Cypress S6J3200 Series, Manual

Page: 423 / 1355

CHAPTER 18:Sound Generator
422 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
3.5.1.
Single Operation of Sound Generator by MCU
This section shows the single operation flow of the Sound Generator by MCU.
Figure 3
-
7 Single Operation of Sound Generator by MCU
(1) Set the information to control the Sound Generator to the Sound Control Register (SGCR) by software.
Initialize the Interrupt status bit (SGCR.INT) and set the Interrupt enable bit (SGCR.INTE).
(2) Set registers "Amplitude Data Register (SGAR)", "Frequency Data Register (SGFR)", "Tone Output
Number Register (SGNR)", "Time Cycle Register (SGTCR)", "Increase and Decrease Data Register
(SGIDR)" and "PWM Cycle Data Register (SGPCR)" by software. (*1: Set only the necessary registers.)
(3) Write "1" to the Start bit (SGCR.ST).
(4) The outputs of SGO and SGA start.
(5) The Tone pulse counter counts the number of tone pulses. When the following conditions are satisfied,
the interrupt is generated.
-
Tone pulse counter is 0x00
-
Decrement counter is 0x00
-
At the rising edge of SGO
(6) MCU clears the interrupt.
(7) Software writes "0" to the Start bit (SGCR.ST) to stop outputting the sound.
External Sound
Output
SG RAM DMAC MCU
SGO, SGA output #1
Time Cycle Register (SGTCR)
Increase and Decrease Data Register (SGNR)
PWM Output Number Register (SGPCR)
Sound Control Register (SGCR)
Start
∬ ∬ ∬ ∬ ∬
SGO, SGA output #n
(3)
:
:
Interrupt
(4)
(5)
Sound Control Register (SGCR)
Stop
Amplitude Data Register (SGAR)
Frequency Data Register (SGFR)
Tone Output Number Register (SGNR)
(2)
(6)
(7)
Sound Control Register (SGCR)
- Setting and enabling of increase/decrease
- Enabling prescaler, tone and interrupt Interrupt Clear Register (SGCCR)
- Initializing interrupt
Interrupt Clear Register (SGCCR)
- Clearing interrupt
*1
(1)