CHAPTER 33:Graphics Subsystem
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1213
ConfigClockControl
REGISTER_NAME
ConfigClockControl
OFFSET
0x10xC
ACCESS_SIZE
W
MULTIPLE
NUMERIC_TYPE
OTHER
Controls config clock generation
BIT_OFFSET
31
30
29
28
27
26
25
24
BIT_NAME
Reserved
ACCESS_TYPE
R0,WX
PROT_TYPE
RpL/WpL
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
23
22
21
20
19
18
17
16
BIT_NAME
Reserved
ACCESS_TYPE
R0,WX
PROT_TYPE
RpL/WpL
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
Reserved
ACCESS_TYPE
R0,WX
PROT_TYPE
RpL/WpL
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
Reserved
ConfigClockSelect[2:0]
ACCESS_TYPE
R0,WX
R/W
PROT_TYPE
RpL/WpL
INITIAL_VALUE
0
0
0
0
0
0
0
1
[bit2:0] ConfigClockSelect : Configuration register Clock Select
Divider of bus clock to generate the configuration register clock, given minus one.
Note:
−
The value "0" is not allowed.
Summary of Contents for S6J3200 Series
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