Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
644 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
[bit22] ptp_pdelay_req_frame_received: PTP Pdelay_Req frame received
Bit Description
0 Interrupt de-asserted.
1 Interrupt asserted. Indicates a PTP Pdelay_Req frame has been received.
[bit21] ptp_sync_frame_transmitted: PTP Sync frame transmitted
Bit Description
0 Interrupt de-asserted.
1 Interrupt asserted. Indicates a PTP Sync frame has been transmitted.
[bit20] ptp_delay_req_frame_transmitted: PTP Delay_Req frame transmitted
Bit Description
0 Interrupt de-asserted.
1 Interrupt asserted. Indicates a PTP Delay_Req frame has been transmitted.
[bit19] ptp_sync_frame_received: PTP Sync frame received
Bit Description
0 Interrupt de-asserted.
1 Interrupt asserted. Indicates a PTP Sync frame has been received.
[bit18] ptp_delay_req_frame_received: PTP Delay_Req frame received
Bit Description
0 Interrupt de-asserted.
1 Interrupt asserted. Indicates a PTP Delay_Req frame has been received.
[bit17:15] Reserved
Writing has no effect. These bits will read “111” if bits [17:15] of Interrupt Mask register are set
otherwise it will read “000”.
[bit14] pause_frame_transmitted: Pause frame transmitted
Bit Description
0 Interrupt de-asserted.
1
Interrupt asserted. Indicates a pause frame has been successfully transmitted after being initiated from
the Network Control register or from the
tx_pause
control pin.
[bit13] pause_time_elapsed: Pause Time elapsed
Bit Description
0 Interrupt de-asserted.
1
Interrupt asserted. Set when either the Receive Pause Quantum register decrements to zero, or when a
valid pause frame is received with a zero pause quantum field.
[bit12] pause_frame_with_non_zero_pause_quantum_received: Pause frame with
non-zero pause quantum received
Bit Description
0 Interrupt de-asserted.
1 Interrupt asserted. Indicates a valid pause has been received that has a non-zero pause quantum field.