Cypress S6J3200 Series, Manual

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CHAPTER 21:Ethernet MAC
716 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.61.
Octets Receive Bottom Register
(ETHERNETn_octets_rxed_bottom)
Description of Octets Receive [31:0] register is shown. When reading the Octets Receive registers, bits
[31:0] (ETHERNETn_octets_rxed_bottom) should be read prior to bits [47:32]
(ETHERNETn_octets_rxed_top) to ensure reliable operation.
REGISTER_NAME ETHERNETn_octets_rxed_bottom
OFFSET 0x150
ACCESS_SIZE W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME count[31:24]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME count[23:16]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME count[15:8]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME count[7:0]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
[bit31:0] count: Received octets in frame without errors [31:0]
The number of octets received in valid frames of any type. This counter is 48-bits, and is read through
two registers (ETHERNETn_octets_rxed_top and ETHERNETn_octets_rxed_bottom). This count does
not include octets from pause frames, and is only incremented if the frame is successfully filtered and
copied to memory.