Cypress S6J3200 Series, Manual

Page: 414 / 1355

CHAPTER 18:Sound Generator
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 413
3.2.
Relation between the Frequency Data Register (SGFR) and Tone Pulse
Signal
This section describes the relation between the Frequency Data Register (SGFR) and a tone pulse
signal.
Figure 3
-
3 The Relation between the Frequency Data Register (SGFR) and Tone Pulse Signal
The tone pulse signal transits between "L" and "H" at every cycle of "(Frequency Data Register [SGFR] +
1) x 1 PWM cycle)". This signal is generated by an internal toggle flip-flop.
When the Tone output bit (TONE) of the Sound Control Register (SGCR) is "0", the tone pulse signal is
mixed with a PWM pulse, and is output from the SGO pin. And when the Tone output bit (TONE) of the
Sound Control Register (SGCR) is "1", the tone pulse signal is output without being mixed.
Note:
−
During operation, in the case of changing a register value, meet the following either conditions.
(1)Sound generator is in the stop state (SGCR.BUSY="0").
(2)The changing comes between an interrupt occurrence and falling edge of the first tone pulse.
(The limit time = (Frequency Data Register [SGFR] + 1) x 1 PWM cycle)
When it meets neither condition, the sound output cannot guarantee the expected duty ratio.
Tone pulse signal
1 tone cycle
(Frequency Data Register [SGFR] + 1) x 1 PWM cycle
(Frequency Data Register [SGFR] + 1) x 1 PWM cycle
1 tone cycle