CHAPTER 20:Sound Mixer
506
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
3.6.
Data Output Control
Subordinate macro data transfer settings are regarded as DMAC INF.
A DMA request is received from a subordinate macro (DAC, PCMPWM, I2S), and [DATATN setting value
+ 1] data items are transferred to the macro specified by the MACRO field of the MXOCTRL register.
3.6.1.
Function Details (Data Protocol Specifications)
1. Receive DMA request.
2. When [MXOCTRL register DATATN setting value + 1] or more of data is accumulated in the output
buffer, send an ACK signal.
3. Following ACK transfer, send data. After data send is complete, end sequence of transfer protocols.
(The next request cannot be accepted until the sequence of transfer protocols is complete.)
3.7.
AHB Slave Interface
Mixer macros provide two AHB slave interface groups: for WFG interfacing and for CPU interfacing. AHB
Slave interface specifications are shown in Table 3-3 and Table 3-4.
3.7.1.
AHB Slave Interface (CPU/DMA)
Table 3-3 AHB Slave interface (CPU/DMA)
Item
Table_Header
Burst transfer
Mixer macros support burst transfer. However, all burst transfer is processed as a single transfer.
Protection control
not support
Response
OKAY and ERROR only
Access size
8,16,32bit only
Width of address
13bit
Notes:
−
The following accesses cause the slave error response.
−
1) When the access destination is an address that does not exist in the memory map
−
2) The write access was done to the read only register.
−
3) When the access size is not supported.
−
(For example it accessed MXWFGnDADR/MXPMISnDADR with 8bit or 16bit) n=0 to 4
3.7.2.
WFG Dedicated AHB Slave Interface
Table 3-4 WFG AHB Slave interface
Item
Table_Header
Burst transfer
not support
Protection control
not support
Response
OKAY and ERROR only
Access size
8,16,32bit only
Width of address
10bit
Summary of Contents for S6J3200 Series
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