Cypress S6J3200 Series, Manual

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CHAPTER 26:PCMPWM
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 999
4.6.
PCM Interrupt Enable Register (PCMPWMi_INTREN)
This PCM Interrupt Enable Register is used to enable or disable individual interrupts of the PCMPWM
module.
REGISTER_NAME PCMPWMi_INTREN
OFFSET 0x00000014
ACCESS_SIZE B, H, W
MULTIPLE 0
NUMERIC_TYPE
-
OTHER
-
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME Reserved DMA_ERR UDRN OVFL DREQ
ACCESS_TYPE R0,WX R/W R/W R/W R/W
PROT_TYPE Wp
INITIAL_VALUE 0 0 0 0 0
[bit3] DMA_ERR : DMA Block Error
This bit enables or disables the DMA block error interrupt.
Bit Description
0 The DMA block error interrupt is disabled
1 The DMA block error interrupt is enabled
[bit2] UDRN : FIFO Under-Run Error
This bit enables or disables the FIFO under-run error interrupt.