Cypress S6J3200 Series, Manual

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CHAPTER 27:HyperBus Interface
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 1027
4.6.
Memory Timing Register (HYPERBUSIn_MTR0 to 1)
The memory timing for each memory space is set up.
REGISTER_NAME HYPERBUSIn_MTRi
OFFSET 0x30 + i*4
ACCESS_SIZE B H W
MULTIPLE 0:1
NUMERIC_TYPE
OTHER
Table 4-6 HYPERBUSI Memory Timing Register Description
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME RCSHI[3] RCSHI[2] RCSHI[1] RCSHI[0] WCSHI[3] WCSHI[2] WCSHI[1] WCSHI[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
-
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME RCSS[3] RCSS[2] RCSS[1] RCSS[0] WCSS[3] WCSS[2] WCSS[1] WCSS[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
-
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME RCSH[3] RCSH[2] RCSH[1] RCSH[0] WCSH[3] WCSH[2] WCSH[1] WCSH[0]
ACCESS_TYPE R/W R/W R/W R/W R/W R/W R/W R/W
PROT_TYPE
-
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME RFU RFU RFU RFU LTCY[3] LTCY[2] LTCY[1] LTCY[0]
ACCESS_TYPE R0,WX R0,WX R0,WX R0,WX R/W R/W R/W R/W
PROT_TYPE
-
INITIAL_VALUE 0 0 0 0 0 0 0 1