Cypress S6J3200 Series, Manual

Page: 711 / 1355

CHAPTER 21:Ethernet MAC
710 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.55.
Single Collision Frames Register (ETHERNETn_single_collisions)
Description of Single Collision Frames register is shown.
REGISTER_NAME ETHERNETn_single_collisions
OFFSET 0x138
ACCESS_SIZE W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME Reserved count[17:16]
ACCESS_TYPE R0,WX R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00 0x0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME count[15:8]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME count[7:0]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
[bit31:18] Reserved
Always read "0". Writing has no effect.
[bit17:0] count: Single collision frames
An 18-bit register counting the number of frames experiencing a single collision before being
successfully transmitted, i.e. no under run.