Cypress S6J3200 Series, Manual

Page: 1178 / 1355

CHAPTER 32:Memory Protection Unit for AHB
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 1177
4.6.
MPU AHB Start Address Registers (MPUHn_SADDR1 to 8)
Each region in MPU AHB can be defined by specifying the start address and end address for that
particular region. The MPUHn_SADDR1 to 8 registers are used to specify the start address for the eight
regions. The start address indicates the first address for that region. MPUHn_SADDR1 is the Start
Address Register for Region 1 and is explained below. Refer to the device-specific datasheet for the
number of regions available .
MPUHn_SADDR1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
S
A
D
D
R
[3
1]
S
A
D
D
R
[3
0]
S
A
D
D
R
[2
9]
S
A
D
D
R
[2
8]
S
A
D
D
R
[2
7]
S
A
D
D
R
[2
6]
S
A
D
D
R
[2
5]
S
A
D
D
R
[2
4]
S
A
D
D
R
[2
3]
S
A
D
D
R
[2
2]
S
A
D
D
R
[2
1]
S
A
D
D
R
[2
0]
S
A
D
D
R
[1
9]
S
A
D
D
R
[1
8]
S
A
D
D
R
[1
7]
S
A
D
D
R
[1
6]
S
A
D
D
R
[1
5]
S
A
D
D
R
[1
4]
S
A
D
D
R
[1
3]
S
A
D
D
R
[1
2]
S
A
D
D
R
[1
1]
S
A
D
D
R
[1
0]
S
A
D
D
R
[9
]
S
A
D
D
R
[8
]
S
A
D
D
R
[7
]
S
A
D
D
R
[6
]
S
A
D
D
R
[5
]
S
A
D
D
R
[4
]
S
A
D
D
R
[3
]
S
A
D
D
R
[2
]
S
A
D
D
R
[1
]
S
A
D
D
R
[0
]
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R
W
P
R0 R0 R0 R0 R0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Position Bit Field Name Bit Description
[31:0] SADDR
Start Address
Start address for region 1
Note:
The MPUHn_SADDR1 to 8 registers can only be written when the corresponding region is disabled
(MPUHm_CTRL1 to 8:MPUEN = "0") or the MPU is disabled (MPUHn_CTRL0:MPUEN = "0").