Cypress S6J3200 Series, Manual

Page: 15 / 1355

Table of Contents
14 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.135. EtherType 2 Register i (ETHERNETn_screening_type_2_ethertype_reg_i) (i=0 to
7) .......................................................................................................................... 816
4.136. Type2 Compare Word 0 i Register (ETHERNETn_type2_compare_i_word_0)
(i=0 to 31) ............................................................................................................. 817
4.137. Type2 Compare Word 1 i Register (ETHERNETn_type2_compare_i_word_1)
(i=0 to 31) ............................................................................................................. 818
5. Functional Limitations ......................................................................................................... 820
5.1. The interrupts on the pause frame reception ........................................................ 820
5.2. Priority Flow Control - pausing the transmitting the frames .................................. 820
5.3. Priority Queuing - screening using DS/TC field in IP header ................................ 820
5.4. Priority Queuing - screening using compare_offset = "10" or "11" ........................ 820
5.5. Enable/Disable the partial store and forward mode .............................................. 820
5.6. PTP - single step time stamping ........................................................................... 820
5.7. PTP/gPTP - The ptp_sync_frame_transmitted interrupt ....................................... 820
5.8. PTP/gPTP - TSU timer comparison with 0 ............................................................ 821
CHAPTER 22: Media Local Bus Interface (MediaLB) ........................................................................ 822
1. Overview ............................................................................................................................ 823
2. Configuration and Block Diagram ....................................................................................... 825
3. Operation of the MediaLB ................................................................................................... 830
3.1. Notes on Using MediaLB ...................................................................................... 830
3.2. List of References................................................................................................. 830
4. Registers ............................................................................................................................ 831
4.1. MediaLBn Device Control Configuration Register (MLBn_DCCR) ....................... 837
4.2. MediaLBn System Status Configuration Register (MLBn_SSCR) ........................ 841
4.3. MediaLBn System Data Configuration Register (MLBn_SDCR) .......................... 844
4.4. MediaLBn System Mask Configuration Register (MLBn_SMCR) ......................... 845
4.5. MediaLBn Version Control Configuration Register (MLBn_VCCR)....................... 848
4.6. MediaLBn Synchronous Base Address Configuration Register (MLBn_SBCR) ... 850
4.7. MediaLBn Asynchronous Base Address Configuration Register (MLBn_ABCR)
.............................................................................................................................
852
4.8. MediaLBn Control Base Address Configuration Register (MLBn_CBCR) ............ 854
4.9. MediaLBn Isochronous Base Address Configuration Register (MLBn_IBCR) ...... 856
4.10. MediaLBn Channel Interrupt Configuration Register (MLBn_CICR) ..................... 858
4.11. MediaLBn AHB Master Control Register (MLBn_AHBMCTL) ............................... 860
4.12. MediaLBn Channel Entry Configuration Register (MLBn_CECR0 -
MLBn_CECR15) ................................................................................................... 861
4.13. MediaLBn Channel Status Configuration Register (MLBn_CSCR0 -
MLBn_CSCR15) ................................................................................................... 865
4.14. MediaLBn Channel Current Buffer Configuration Register (MLBn_CCBCR0 -
MLBn_CCBCR15) ................................................................................................ 871
4.15. MediaLBn Channel Next Buffer Configuration Register (MLBn_CNBCR0 -
MLBn_CNBCR15) ................................................................................................ 873
4.16. MediaLBn Local Channel Buffer Configuration Register (MLBn_LCBCR0 -
MLBn_LCBCR15) ................................................................................................. 875
4.17. MediaLBn Module Identification Register (MLBn_MID) ........................................ 877
CHAPTER 23: Stereo Audio DAC ...................................................................................................... 878
1. Overview ............................................................................................................................ 879
2. Configuration and Block Diagram ....................................................................................... 879