Cypress S6J3200 Series, Manual

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CHAPTER 31:Memory Protection Unit for AXI
1144 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.
Registers
This section describes the registers of MPU AXI
The MPU AXI module contains various registers to configure its operation, to monitor its status and to
read the information it has collected from the AXI master interfaces at the time of the memory protection
violation.
The MPU AXI module is allocated 1 KB of MCU address space for mapping the Configuration and Status
Registers (i.e. CSRs). The address area allocated to MPU AXI and the Control and Status Registers in
MPU AXI are explained in this section.
The suffix 'n' in the register name indicates that the register is an instance 'n' of the module.

Registers of MPU AXI
The following registers are available for MPU AXI:
−
MPU AXI Control Register (MPUXn_CTRL0)
−
MPU AXI NMI Enable Register (MPUXn_NMIEN)
−
MPU AXI Write Error Control Register (MPUXn_WERRC)
−
MPU AXI Write Error Address Register (MPUXn_WERRA)
−
MPU AXI Read Error Control Register (MPUXn_RERRC)
−
MPU AXI Read Error Address Register (MPUXn_RERRA)
−
MPU AXI Region Control Registers (MPUXn_CTRL1 to 8)
−
MPU AXI Start Address Registers (MPUXn_SADDR1 to 8)
−
MPU AXI End Address Registers (MPUXn_EADDR1 to 8)
−
MPU AXI Unlock Register (MPUXn_UNLOCK)
−
MPU AXI Module ID Register (MPUXn_MID)

Memory Layout of MPU AXI Registers
Offset +3 +2 +1 +0
0x00000000
MPUXn_CTRL0
00000000 00000000 00000001 00000000
0x00000004
MPUXn_NMIEN
00000000 00000000 00000000 00000001
0x00000008
MPUXn_WERRC
00000000 00000000 00000XXX XXXXXXX0
0x0000000C
MPUXn_WERRA
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0x00000010
MPUXn_RERRC
00000000 00000000 00000XXX XXXXXXX0
0x00000014
MPUXn_RERRA
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0x00000018
MPUXn_CTRL1
00000000 00000000 00000000 00000000