Cypress S6J3200 Series, Manual

Page: 701 / 1355

CHAPTER 21:Ethernet MAC
700 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.46.
Pause Frames Transmitted Register
(ETHERNETn_pause_frames_txed)
Description of Pause Frames Transmitted register is shown.
REGISTER_NAME ETHERNETn_pause_frames_txed
OFFSET 0x114
ACCESS_SIZE W
MULTIPLE
NUMERIC_TYPE
OTHER
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME Reserved
ACCESS_TYPE R0,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME count[15:8]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME count[7:0]
ACCESS_TYPE R,WX
PROT_TYPE Wp
INITIAL_VALUE 0x00
[bit31:16] Reserved
Always read "0". Writing has no effect.
[bit15:0] count: Transmitted pause frames
A 16-bit register counting the number of pause frames transmitted. Only pause frames triggered by the
register interface or through the external pause pins are counted as pause frames. Pause frames
received through the External FIFO Interface are counted in the frames transmitted counter.