Cypress S6J3200 Series, Manual

Page: 1322 / 1355

CHAPTER 36:Appendix
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G 1321
3.
Master Access Table
This section shows the access policies for the bus masters.
Slave Master
Group/Category Module
CPU DMAC#0 TIC DAP SHE MLB
Graphic
Subsystem
Ethernet
M M M M M M
Core Internal
TCRAM (Mem) Y N
TCFLASH_TCM (Mem) Y N
TCFLASH_AXI (Mem) Y N
Core Slave
TCRAM (Mem) Y
TCFLASH_TCM (Mem) Y
TCFLASH_AXI (Mem) Y
Scratch Pad RAM
Memory Y
Register p Y N
EAM EAM Y
AppS #3
APPLGRP_MASTER
Ethernet p Y N
MPU_AXI p Y N
MLB p Y N
MPU_AHB p Y N
PRGCRC p Y N
SMIX
(Sound System)
p Y N
Audio DAC (Sound System) p Y N
PCM-PWM (Sound System) p Y N
I2S0
(Sound System)
p Y N
I2S1 p Y N
Wave Form Generator
(Sound System)
p Y N
Hyper Bus ch.0 Control
Register
p Y N