Cypress S6J3200 Series, Manual

Page: 319 / 1355

CHAPTER 15:12-/10-/8-bit Analog to Digital Converter
318 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
5.10.2.
Group Interrupted Interrupt Clear Register (ADC12Bn_GRPIRQC1)
BIT_OFFSET 31 30 29 28 27 26 25 24
BIT_NAME GRPIRQC63 GRPIRQC62 GRPIRQC61 GRPIRQC60 GRPIRQC59 GRPIRQC58 GRPIRQC57 GRPIRQC56
ACCESS_TYPE R0,W R0,W R0,W R0,W R0,W R0,W R0,W R0,W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 23 22 21 20 19 18 17 16
BIT_NAME GRPIRQC55 GRPIRQC54 GRPIRQC53 GRPIRQC52 GRPIRQC51 GRPIRQC50 GRPIRQC49 GRPIRQC48
ACCESS_TYPE R0,W R0,W R0,W R0,W R0,W R0,W R0,W R0,W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 15 14 13 12 11 10 9 8
BIT_NAME GRPIRQC47 GRPIRQC46 GRPIRQC45 GRPIRQC44 GRPIRQC43 GRPIRQC42 GRPIRQC41 GRPIRQC40
ACCESS_TYPE R0,W R0,W R0,W R0,W R0,W R0,W R0,W R0,W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
BIT_OFFSET 7 6 5 4 3 2 1 0
BIT_NAME GRPIRQC39 GRPIRQC38 GRPIRQC37 GRPIRQC36 GRPIRQC35 GRPIRQC34 GRPIRQC33 GRPIRQC32
ACCESS_TYPE R0,W R0,W R0,W R0,W R0,W R0,W R0,W R0,W
PROT_TYPE
INITIAL_VALUE 0 0 0 0 0 0 0 0
[bit31:0] GRPIRQC63 to 32 : Group Interrupted Clear bits
Bit Description
0 No effect.
1 Group interrupted interrupt cleared.
When this bit is set to "1", the corresponding bit in the ADC12Bn_GRPIRQ1 register and GRPIRQ bit in
the corresponding ADC12Bn_CHSTAT32 to 63 register are cleared.