CHAPTER 27:HyperBus Interface
1032
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.9.
Test Register (HYPERBUSIn_TEST)
This register is internal device test purpose. When writing this register, it should be set to 0.
REGISTER_NAME
HYPERBUSIn_TEST
OFFSET
0x48
ACCESS_SIZE
B H W
MULTIPLE
NUMERIC_TYPE
OTHER
Table 4-9 HYPERBUSI Test Register Description
BIT_OFFSET
31
30
29
28
27
26
25
24
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
23
22
21
20
19
18
17
16
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
15
14
13
12
11
10
9
8
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RFU
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
BIT_OFFSET
7
6
5
4
3
2
1
0
BIT_NAME
RFU
RFU
RFU
RFU
RFU
RFU
RFU
RVD
ACCESS_TYPE
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
R/W
PROT_TYPE
-
INITIAL_VALUE
0
0
0
0
0
0
0
0
[bit31:1] RFU : Reserved for Future Use
When writing this register, this bit should be set to 0 for future compatibility. When reading this register,
this bit is 0 for future compatibility.
[bit0] RVD : Reserved bit
This bit is reserved. It should be set to 0.
Summary of Contents for S6J3200 Series
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