Cypress S6J3200 Series, Manual

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CHAPTER 32:Memory Protection Unit for AHB
1174 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.3.
MPU AHB Memory Error Control Register (MPUHn_MERRC)
This is a read-only register that provides the control information of AHB transfer for which memory
protection violation was detected. This register can be read to get the privileged mode and transfer mode
(write/read) information of the AHB transfer.
MPUHn_MERRC
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0 read0
H
P
R
OT
H
W
R
ITE
R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0 R0
R R
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Bit Position Bit Field Name Bit Description
[31:8] read0
-
[7:2] read0
-
[1] HPROT
AHB Transfer Privileged Mode.
This bit provides the status of the HPROT signal of the AHB transfer for which
memory protection violation is detected.
[0] HWRITE
AHB Transfer Mode.
This bit provides the status of the HWRITE signal of the AHB transfer for
which memory protection violation is detected.