Cypress S6J3200 Series, Manual

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CHAPTER 32:Memory Protection Unit for AHB
1168 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.
Registers
This section describes the registers of the MPU AHB
The MPU AHB module contains various registers to configure its operation, to monitor its status and to
read the information it has collected from the AHB master interface at the time of a memory protection
violation.
The MPU AHB module is allocated 1 KB of MCU address space for mapping the Configuration and Status
Registers (CSRs). The address area allocated to the MPU AHB and the CSRs in the MPU AHB are
explained in this section.
The suffix ‘n’ in the register name indicates that the register is an instance ‘n’ of the module.

Registers of MPU AHB
The following registers are available for the MPU AHB:
−
MPU AHB Control Register (MPUHn_CTRL0)
−
MPU AHB NMI Enable Register (MPUHn_NMIEN)
−
MPU AHB Memory Error Control Register (MPUHn_MERRC)
−
MPU AHB Memory Error Address Register (MPUHn_MERRA)
−
MPU AHB Region Control Registers (MPUHn_CTRL1 to 8)
−
MPU AHB Start Address Registers (MPUHn_SADDR1 to 8)
−
MPU AHB End Address Registers (MPUHn_EADDR1 to 8)
−
MPU AHB Unlock Register (MPUHn_UNLOCK)
−
MPU AHB Module ID Register (MPUHn_MID)

Memory Layout of MPU AHB Registers
Offset +3 +2 +1 +0
0x00000000
MPUHn_CTRL0
00000000 00000000 00000001 00000000
0x00000004
MPUHn_NMIEN
00000000 00000000 00000000 00000001
0x00000008
MPUHn_MERRC
00000000 00000000 00000000 00000000
0x0000000C
MPUHn_MERRA
00000000 00000000 00000000 00000000
0x00000010
MPUHn_CTRL1
00000000 00000000 00000000 00000000
0x00000014
MPUHn_SADDR1
00000000 00000000 00000000 00000000
0x00000018
MPUHn_EADDR1
00000000 00000000 00000000 00011111