Cypress S6J3200 Series, Manual

Page: 243 / 1355

CHAPTER 13:Low-voltage Detection
242 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
[bit16] LVDL2E: LVDL2 operation enable bit
Bit Description
0 STOP operation
1 Enable operation (Initial value)
Notes:
−
LVDL2E initial value is 0 for revision A, 1 for any revision other than A.
[bit14] LVDH1S: LVDH1 operation selection bit
Bit Description
0 Reset (Initial value)
1 Interrupt
Notes:
−
LVDH1 Reset level can be changed by EXVRSTCNT bit in SYSC0_SPECFGR register.
If VCC12 needs to be switched off without entering PSS mode, please set LVDH1S bit to "0", and
moreover set EXVRSTCNT bit to "0" for other product than revsion.M.
[bit12:9] LVDH1V: LVDH1 voltage setting bits
Bits Detection Voltage [V] Guaranteed MCU operation range
0000 2.35
No *1
0001 2.75
0010 2.85
0011 3.60
0100 3.80
Yes
0101 4.00
0110 4.20 (Initial value)
0111 4.40
1000 4.65
1001 4.65
1010 4.65
1011 4.65
1100 4.65
1101 4.65
1110 4.65
1111 4.65
Note:
−
*1: These LVD settings cannot be used to reliably generate a reset before voltage dips below
minimum guaranteed MCU operation voltage, as these detection levels are below the minimum
guaranteed MCU operation voltage.
−
When changing detection voltage level toward lower level, please change it step by step or set
LVDH2E to “0”(Stop operation) to avoid activation by interference of LVDH1 switching activity.