CHAPTER 18:Sound Generator
450
S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
4.3.
Amplitude Data Register (SGAR)
The Amplitude Data Register (SGAR) stores the reload value for a PWM pulse generator.
The register value represents sound amplitude and is reloaded into the PWM pulse generator at the end
of every tone cycle.
bit
15
14
13
12
11
10
9
8
Field
SGAR[15:8]
Attribute
R/W
Initial value
0x00
bit
7
6
5
4
3
2
1
0
Field
SGAR[7:0]
Attribute
R/W
Initial value
0x00
[bit15:0] SGAR : Amplitude data bits
These bits store the reload value for the PWM pulse generator,
and the value is written either in the following ways.
(1)Software writes a value to this register.
(2)DMAC writes a value through DMA Transfer Intermediate Register (SGDMAR).
When in decreasing the value of this register, 0x0000 is the lower limit and the value doesn't roll over to
0xFFFF from it.
When in increasing the value of this register, 0xFFFF is the upper limit and the value doesn't roll over to
0x0000 from it.
In any case, the Sound Generator keeps operating until the Start bit (SGCR.ST) is cleared.
Notes:
−
The number of clock cycles in high width of 1 PWM is equal to "SGAR + 1".
−
During operation, in the case of changing a register value, meet the following either conditions.
(1)Sound generator is in the stop state (SGCR.BUSY="0").
(2)The changing comes between an interrupt occurrence and falling edge of the first tone pulse.
(The limit time = (Frequency Data Register [SGFR] + 1) x 1 PWM cycle)
When it meets neither condition, the sound output cannot guarantee the expected duty ratio.
Summary of Contents for S6J3200 Series
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