Cypress S6J3200 Series, Manual

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CHAPTER 18:Sound Generator
408 S6J3200 Series Hardware Manual Document Number: 002-04852 Rev. *G
1.
Overview
The Sound Generator generates and outputs a tone pulse signal, a PWM pulse signal, or mixed one of
both signals according to the setting by MCU. It is enabled to set the frequency of the tone pulse signal,
sound volume (amplitude of PWM pulse), and length of sound. The Sound Generator consists of the
following registers and counters.

DMA Transfer Update Enable Register (SGDER)

Sound Control Register (SGCR)

Amplitude Data Register (SGAR)

Frequency Data Register (SGFR)

Time Cycle Register (SGTCR)

Tone Output Number Register (SGNR)

Increase and Decrease Data Register (SGIDR)

PWM Cycle Data Register (SGPCR)

DMA Transfer Intermediate Register (SGDMAR)

Interrupt Clear Register (SGCCR)

PWM pulse generation counter

Frequency counter

Decrement counter

Tone pulse counter
Functions of Sound Generator
Table 1-1 Functions of Sound Generator
No Item Function
1 Operation clock Bus clock (BCLK)
2 Clock input
For clock input of the Sound Generator, divide the bus clock (BCLK) and use it.
-
1 x BCLK
-
1/2 x BCLK
-
1/4 x BCLK
-
1/8 x BCLK
3 Waveform Rectangular wave for sound ( tone pulse output, sound output from SGO pin)
4 Volume of sound
It is enabled to set their arbitrary level (PWM pulse output). (Amplitude output from
SGA pin)
5 Frequency
It is enabled to set their arbitrary level for sound signal frequency. (Frequency
setting and PWM cycle setting)
6 Length of sound It is enabled to set their arbitrary level.
7 Interrupt
-
It is enabled to generate interrupt requests at the end of outputting sound at
programmed length (An overflow of Tone pulse counter).
-
It is enabled to generate interrupts by writing "1" to the Start bit (SGCR.ST) when
in DMA mode (SGCR.DMA="1").