Texas Instruments OMAP36 Series, Техническое справочное руководство

Страница: 354 / 3738

PRCM
Global control
Power domain X control
PSCON
PRM
registers
Clock
generator
Module 1
Module 2
Module X
Logic and memory power
switches and retention
control
CM
registers
Reset
manager
Domain power
controller
PRM
Domain wake-
up controller
CM
Domain clock
controller
Module 1
clock controller
Module 2
clock controller
Module X
clock controller
Module wakeups, global
events, dependency
wakeups
To modules
Interaction with other power
domains control blocks
prcm-072
Public Version
PRCM Functional Description
www.ti.com
Figure 3-76. Device Power Reset and Clock Controllers
Figure 3-76 shows the functions in one power domain block:
• A module clock controller (for example, module X clock controller) uses a hardware handshake
protocol to communicate directly with the module. It controls the idle transition of the target module and
responds to the standby requests of the initiator module (for details, see
Section 3.1.4.2 , Autoidle
Clock Control). Depending on the mode, the clock controller sends clock commands (enable/disable)
to the clock generator. The registers that control the functional and interface clocks in the module are
directly mapped to the module clock controller.
• The domain clock controller gathers information from the following:
– All module clock controllers of the power domain
– The domain power controller
– The domain wake-up controller
– The other power domain control blocks
The domain clock controller informs the domain power controller when all conditions for the domain
power transition are met (domain clocks are idle, no initiator is requesting service, no wake-up event is
pending) to allow a domain power transition. On a wake-up event, the domain clock controller starts
the module domain clocks, if power is present.
• The domain power controller communicates with the domain clock controller, the domain wake-up
controller, and PSCON. Depending on the register settings for clock domain activity (idle or active), it
sends requests to the PSCON to power down/up the domain logic and memory, or to enable retention
mode.
• The PSCON sequences all sleep and wake-up transitions between on, off, and retention modes for
logic and memory. It also ensures that the domain is correctly isolated when it enters off or retention
354 Power, Reset, and Clock Management SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated