Texas Instruments OMAP36 Series, Техническое справочное руководство

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General-Purpose Timers Register Manual
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Table 16-32. TLDR
Address Offset 0x02C
Physical Address 0x4831 802C Instance GPT1
0x4903 202C GPT2
0x4903 402C GPT3
0x4903 602C GPT4
0x4903 802C GPT5
0x4903 A02C GPT6
0x4903 C02C GPT7
0x4903 E02C GPT8
0x4904 002C GPT9
0x4808 602C GPT10
0x4808 802C GPT11
Description This register holds the timer load values.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
LOAD_VALUE
Bits Field Name Description Type Reset
31:0 LOAD_VALUE The value of the timer load register RW 0x00000000
Table 16-33. Register Call Summary for Register TLDR
General-Purpose Timers
• Timer Mode Functionality : [0] [1] [2]
• 1-ms Tick Generation (Only GPTIMER1, GPTIMER2, and GPTIMER10) : [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
• Prescaler Functionality : [13] [14]
• Pulse-Width Modulation : [15] [16] [17]
• Timer Counting Rate : [18] [19] [20] [21] [22]
• Accessing GP Timer Registers : [23]
• Writing to Timer Registers : [24]
• Write Posting Synchronization Mode : [25]
General-Purpose Timers Register Manual
• GP Timer Register Mapping Summary : [26] [27] [28]
2736 Timers SWPU177N – December 2009 – Revised November 2010
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