Public Version
IVA2.2 Subsystem Register Manual
www.ti.com
Table 5-617. Register Call Summary for Register VLCD_VLD_ERRCTL
IVA2.2 Subsystem Register Manual
•
iVLCD Register Mapping Summary
Table 5-618. VLCD_VLD_ERRSTAT
Address Offset
0x0000 10F0
Physical Address
0x0008 10F0
Instance
iVLCD
Description
This register reports VLCD errors
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
VLD
EOB
UVLD
RINGBUFF
Bits
Field Name
Description
Type
Reset
31:4
RESERVED
Write 0s for future compatibility
R
0x000
Read returns 0
3
RINGBUFF
Ring buffer overflow status
R
0x0
2
EOB
EOB error
R
0x0
1
VLD
VLD error
R
0x0
JPEG: Goes "1" when found FDX code at the end of MB
H.263, MPEG4: Goes "1" when found an FLC error
0
UVLD
UVLD error
R
0x0
Table 5-619. Register Call Summary for Register VLCD_VLD_ERRSTAT
IVA2.2 Subsystem Register Manual
•
iVLCD Register Mapping Summary
Table 5-620. VLCD_RING_START
Address Offset
0x0000 10F4
Physical Address
0x0008 10F4
Instance
iVLCD
Description
This register sets the ring buffer start address.
Type
RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
RSTART
Bits
Field Name
Description
Type
Reset
31:13
RESERVED
Write 0s for future compatibility
RW
0x0
Read returns 0
12:0
RSTART
Ring buffer start address
RW
0x0000
Table 5-621. Register Call Summary for Register VLCD_RING_START
IVA2.2 Subsystem Basic Programming Model
•
Setting Up Registers for VLC Operation
•
Setting Up Registers for VLD Operation
IVA2.2 Subsystem Register Manual
•
iVLCD Register Mapping Summary
1030IVA2.2 Subsystem
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
Содержание OMAP36 Series
Страница 174: ...174 List of Tables SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 692: ...692 MPU Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1084: ...1084 IVA2 2 Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1990: ...1990 2D 3D Graphics Accelerator SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2334: ...2334 Memory Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2700: ...2700 Memory Management Units SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2868: ...2868 HDQ 1 Wire SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2974: ...2974 UART IrDA CIR SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3054: ...3054 Multichannel SPI SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3462: ...3462 MMC SD SDIO Card Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3508: ...3508 General Purpose Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3584: ...3584 Initialization SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3648: ...3648 Debug and Emulation SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...