Texas Instruments OMAP36 Series, Техническое справочное руководство

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iva2-017
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IVA2.2 Subsystem Functional Description
Figure 5-17. IVA2.2 MMU Translation Table Hierarchy
NOTE: The MMU passes the lower bits of the virtual address unchanged.
5.3.3.2 MMU Configuration
If the IVA2.2 MMU requires software intervention, the MPU services the event; IVA2.2 MMU service
requests are signaled to the MPU with a dedicated interrupt, M_IRQ[28].
Generally, the MMU is initialized at boot time, but it can also be dynamically reprogrammed. Typically, the
MMU is programmed by the MPU through the IVA2.2 slave port on the L3 interconnect when a new task is
created on the IVA2.2 subsystem. But the DSP also has access to the MMU configuration registers for the
save and restore process. At reset, MMU is disabled and DSP virtual addresses are passed directly
through as physical addresses (not translated). IVA2.2 MMU configuration registers are at system base
address 0x5D00 0000.
For more information about the functionality of the IVA2.2 subsystem MMU module, including interrupts,
register descriptions, and programming model, see
Chapter 15 , Memory Management Units.
729 SWPU177N – December 2009 – Revised November 2010 IVA2.2 Subsystem
Copyright © 2009–2010, Texas Instruments Incorporated