Texas Instruments OMAP36 Series, Техническое справочное руководство

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Device
I2C4
i2c4_scl
Pullup
resistors
(Rp)
Serial clock
line 4
+1.8 V
Power chip(s)
PRCM
Voltage
controller
First VDD channel: VDD0
Second VDD channel: VDD1
i2c4_sda
Serial data
line 4
i2c-015
I2C4
i2c4_scl
i2c4_sda
i2c-016
Device
Public Version
www.ti.com
HS I
2
C Environment
Figure 17-15. HS I
2
C Typical Connection Between Power Chip(s) and for I2C4
17.2.3.1 HS I
2
C Pins for Typical Connections for I2C4
Figure 17-16 shows the HS I
2
C controller I
2
C4 pins used for typical connections with power chips. Its
configuration is in master transmitter only high speed.
Figure 17-16. HS I
2
C Interface Signals for I
2
C4
17.2.3.2 HS I
2
C Interface Typical Connections for I2C4
Table 17-3 lists the pins associated with the I
2
C interface of the HS I
2
C controller I2C4 of the device.
Table 17-3. HS I
2
C Input/Output Description for I2C4
Signal I/O
(1)
Description Reset Value
i2c4_scl I/O(OD) I
2
C serial clock line
(2)
. Open-drain output buffer. Requires external Rp. Hi-Z
i2c4_sda I/O(OD) I
2
C serial data line. Open-drain output buffer. Requires external Rp. Hi-Z
(1)
I = Input; O = Output; OD = Open Drain; Hi-Z = High Impedance
(2)
This signal is also used as retiming input.
2779 SWPU177N – December 2009 – Revised November 2010
Multimaster High-Speed I
2
C Controller
Copyright © 2009–2010, Texas Instruments Incorporated