Texas Instruments OMAP36 Series, Техническое справочное руководство

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L4 Interconnects
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Table 9-113. Region Allocation for L4-Core Interconnect (continued)
Device Name Start Address Description Region Default
(Hex) Number Protection
Group
GPTIMER10 0x4808 6000 Module 27 7
0x4808 7000 L4 interconnect 28 7
GPTIMER11 0x4808 8000 Module 29 7
0x4808 9000 L4 interconnect 30 7
0x4808 A000
Reserved 0x4808 B000 Reserved
0x4808 C000
MAILBOX 0x4809 4000 Module 33 7
0x4809 5000 L4 interconnect 34 7
McBSP5 0x4809 6000 Module 59 7
(MIDI data) 0x4809 7000 L4 interconnect 60 7
MCSPI1 0x4809 8000 Module 35 7
0x4809 9000 L4 interconnect 36 7
MCSPI2 0x4809 A000 Module 37 7
0x4809 B000 L4 interconnect 38 7
MMC/SD/SDIO1 0x4809 C000 Module 39 7
0x4809 D000 L4 interconnect 40 7
0x4809 E000
Reserved Reserved
0x4809 F000
USBHS OTG 0x480A B000 Module 13 7
0x480A C000 L4 interconnect 14 7
MMC/SD/SDIO3 0x480A D000 Module 98 7
0x480A E000 L4 interconnect 99 7
0x480B 0000
Reserved Reserved
0x480B 1000
HDQ/1-Wire 0x480B 2000 Module 57 7
0x480B 3000 L4 interconnect 58 7
MMC/SD/SDIO2 0x480B 4000 Module 41 7
0x480B 5000 L4 interconnect 42 7
ICR 0x480B 6000 Module 88 7
0x480B 7000 L4 interconnect 89 7
MCSPI3 0x480B 8000 Module 66 7
0x480B 9000 L4 interconnect 67 7
MCSPI4 0x480B A000 Module 77 7
0x480B B000 L4 interconnect 78 7
Camera ISP 0x480B C000 Camera ISP 8 3
0x480C 0000 L4 interconnect 75 3
MODEM INTC 0x480C 7000 Module 90 7
0x480C 8000 L4 interconnect 91 7
SR1 0x480C 9000 Module 31 7
0x480C A000 L4 interconnect 32 7
SR2 0x480C B000 Module 68 7
0x480C C000 L4 interconnect 69 7
ICR 0x480C D000 Module 86 7
0x480C E000 L4 interconnect 87 7
Reserved 0x480C F000 Reserved
2066Interconnect SWPU177N – December 2009 – Revised November 2010
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