Texas Instruments OMAP36 Series, Техническое справочное руководство

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Device
power on
3
.
A
c
c
u
m
u
la
to
r
a
n
d
M
in
/M
a
x
/A
v
g
s
e
tt
in
g
Yes
No
Automatic voltage control with
voltage processor?
SR power on RESET
Start
Configure sensor parameters
Set SR_CLK frequency (preferred 100 KHz)
Set the accumulator size
Set sensors average weight parameter
Set the error generator parameters corresponding to
the OPP
Enable VP BOUNDS
interrupt
Enable interrupt generator block
Enable MPU interrupts
Enable sensor core
Set the error weight
Set the error minimum and maximum limit
Software monitoring of
SmartReflex module?
Enable Min/Max/Avg
Enable error generator block
Enable SmartReflex module
1
.
C
lo
c
k
s
e
tt
in
g
2
.
S
e
n
s
o
r
c
o
re
s
e
tt
in
g
4
.
E
rr
o
r
g
e
n
e
ra
to
r
s
e
tt
in
g
Yes
No
5
.
In
te
rr
u
p
t
g
e
n
e
ra
to
r
s
e
tt
in
g
End
Enable functional clock
prcm-UC-006
Enable module
Sensor core disabled
SR module disabled
Functional clock disabled
Min/Max/Avg disabled
Error generator block disabled
Interrupt generator block disabled
Interrupts masked
Set Module Idle state clock activity
Public Version
www.ti.com
PRCM Basic Programming Model
Figure 3-96. SmartReflex Initialization Flow Chart
After the device power-on reset is complete, the SmartReflex module is disabled and its functional clock is
gated.
1. Clock setting
Setting the clock consists of configuring the internal clock frequency of the SmartReflex module and
the state of the functional clock when the module switches to inactive state, and then enabling the
functional clock from the PRCM module of the device.
The internal clock frequency configuration depends on the frequency of SR_ALWON_FCLK and can
be calculated from
Equation 2 . For example, if SR_ALWON_FCLK has a frequency of 38.4 MHz, and
the target SR_CLK frequency is 100 kHz, SRCLKLENGTH is set to 192 (0x0C0).
433 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated