Texas Instruments OMAP36 Series, Техническое справочное руководство

Страница: 565 / 3738

Public Version
www.ti.com
PRCM Register Manual
Table 3-320. Register Call Summary for Register PRM_IRQSTATUS_MPU
PRCM Functional Description
• Recalibration : [0] [1] [2] [3] [4]
• PRCM Interrupts : [5]
• SmartReflex Voltage Control : [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17]
PRCM Basic Programming Model
• Interrupt Configuration Registers : [18]
• Changing OPP Using the SmartReflex Module : [19] [20]
PRCM Use Cases and Tips
• Switch VDD1 OPPs : [21] [22] [23] [24]
• Switch VDD2 OPPs : [25] [26] [27] [28]
PRCM Register Manual
• OCP_System_Reg PRM Register Summary : [29]
Table 3-321. PRM_IRQENABLE_MPU
Address Offset 0x0000 001C
Physical Address 0x4830 681C Instance OCP_System_Reg_PRM
Description The interrupt enable register allows masking/unmasking the module internal sources of interrupt, on a
event-by-event basis. This registers applies on the interrupt line 0 mapped to the MPU interrupt
controller.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
IO_EN
WKUP_EN
RESERVED RESERVED
EVGENON_EN
VC_SAERR_EN VC_RAERR_EN EVGENOFF_EN
TRANSITION_EN
VP2_MINVDD_EN VP1_MINVDD_EN VC_VP1_ACK_EN
VP2_MAXVDD_EN VP1_MAXVDD_EN
VP2_EQVALUE_EN VP1_EQVALUE_EN
VC_BYPASS_ACK_EN VC_TIMEOUTERR_EN VP2_TRANXDONE_EN VP1_TRANXDONE_EN
VP2_NOSMPSACK_EN VP1_NOSMPSACK_EN
IVA2_DPLL_RECAL_EN MPU_DPLL_RECAL_EN
CORE_DPLL_RECAL_EN
PERIPH_DPLL_RECAL_EN
ABB_LDO_TRANXDONE_EN
VP2_OPPCHANGEDONE_EN VP1_OPPCHANGEDONE_EN
SND_PERIPH_DPLL_RECAL_EN
Bits Field Name Description Type Reset
31:29 RESERVED Write 0s for future compatibility. Reads returns 0. R 0x00
28 VC_BYPASS_ACK_EN Voltage controller's acknowledge to the bypass interface RW 0
mask. dual
0x0: Voltage controller's acknowledge to the bypass
interface event is masked.
0x1: Voltage controller's acknowledge to the bypass
interface event generates an interrupt.
27 VC_VP1_ACK_EN Voltage controller's acknowledge to the VDD1 voltage RW 0
processor mask. dual
0x0: Voltage controller's acknowledge to the VDD1
voltage processor event is masked.
0x1: Voltage controller's acknowledge to the VDD1
voltage processor event generates an interrupt.
26 ABB_LDO_TRANXDONE_EN ABB LDO transaction done mask. RW 0
dual
0x0: ABB LDO transaction done event is masked.
0x1: ABB LDO transaction done event generates an
interrupt.
565 SWPU177N – December 2009 – Revised November 2010 Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated