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General-Purpose Timers
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NOTE:
• The PRCM function clock outputs are gated at the PRCM level, assuming all the
modules that share it are disabled in the corresponding register. Disabling GP timers is
a necessary but not sufficient action. The clock is effectively out when all PRCM
conditions are fulfilled. For the other actions to be taken, see
Chapter 3 , Power, Reset,
and Clock Management.
• The PRCM interface clock outputs are gated at the PRCM level, assuming all the
modules that share it are disabled in the corresponding register. Disabling GP timers is
a necessary but not sufficient action. The clock is effectively out when all PRCM
conditions are fulfilled. For the other actions to be taken, see
Chapter 3 , Power, Reset,
and Clock Management.
• The PRCM AUTOIDLE bits are used to link/unlink the GP timers from the clock domain
transitions related to the GPTi_ICLK clocks.
• For further details about source clock gating and domain transitions, see Chapter 3 ,
Power, Reset, and Clock Management.
GP timer modules also have an internal bit, GPTi. TIOCP_CFG [0] AUTOIDLE. The GP timer AUTOIDLE
bit is used to apply an internal interface clock gating strategy.
At the PRCM level, when all conditions to shut off the PRCM functional or interface output clocks are met
(see
Chapter 3 , Power, Reset, and Clock Management, for details), the PRCM automatically launches a
hardware handshake protocol to ensure the GP timer is ready to have its clocks switched off. Namely, the
PRCM asserts an IDLE request to the GP timer.
Although this handshake is a hardware function and is out of software control, the way the GP timer
acknowledges the PRCM IDLE request is configurable through the GPTi.
TIOCP_CFG [4:3] IDLEMODE bit.
Table 16-5 lists the IDLEMODE settings and the related acknowledgement modes.
Table 16-5. IDLEMODE Settings
IDLEMODE Value Selected Mode Description
The GP timer acknowledges unconditionally the
IDLE
request from the PRCM module,
regardless of its internal operations. This mode
00 Force-idle
must be used carefully, because it does not
prevent the loss of data when the clock is
switched off.
The GP timer never acknowledges an IDLE
request from the PRCM module. This mode is
safe from a module point of view, because it
ensures that the clocks remain active. It is not
01 No-idle
efficient from a power-saving perspective,
however, because it does not allow the PRCM
output clock to be shut off and thus the power
domain to be set to a lower power state.
The GP timer acknowledges the IDLE request,
basing its decision on its internal activity. The
acknowledge signal is asserted only when all
10 Smart-idle
pending transactions and IRQ requests are
treated. This is the best approach for efficient
system power management.
11 Reserved
When configured in smart-idle mode, the GP timer also offers an additional granularity on GPTi_FCLK and
GPTi_ICLK gating. The GPTi.
TIOCP_CFG [9:8] CLOCKACTIVITY bit field is used to determine which
clock will be shut down (GPTi_FCLK, GPTi_ICLK, neither of them, or both of them).
The CLOCKACTIVITY setting is used internally to the GP timer to determine the part of the module on
which the conditions to acknowledge the PRCM IDLE request will be tested. For example, if GPTi_FCLK
is not to be shut down on a PRCM IDLE request, the GP timer considers only GPTi_ICLK and the
associated pending activities before acknowledging the request.
2708 Timers SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated