Texas Instruments OMAP36 Series, Техническое справочное руководство

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Start executing from
IVA2_BOOTADDR
Jump to the ROM boot loader
at 0x007E 0000
Reset
IVA2_BOOTMODE = 0?
Yes No
iva2-036
Public Version
IVA2.2 Subsystem Basic Programming Model
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5.4 IVA2.2 Subsystem Basic Programming Model
5.4.1 IVA2.2 Boot
The boot-time configuration registers are IVA_SYSC. SYSC_BOOTADDR and
IVA_SYSC. SYSC_BOOTMOD . These read-only registers are accessible only by the DSP CPU, and their
values are determined when the IVA2.2 is released from reset, using the
CONTROL.CONTROL_IVA2_BOOTADDR and CONTROL.CONTROL_IVA2_ BOOTMOD registers of the
system control module. For more information, see
Chapter 13 , System Control Module. A change to those
registers is not seen (not sampled) by the IVA2.2 until the next reset.
The IVA2.2 boots two ways:
• Boot under MPU control, described in Section 5.4.1.2.1 , Boot Under MPU Control.
• Autonomous boot, described in Section 5.4.1.2.2 , Autonomous Boot.
A boot under MPU control is typically used after the device cold reset as a first-time configuration of the
IVA2.2 subsystem. Subsequent boots of the IVA2.2, resulting from a wake-up transition from OFF state,
for example, use the autonomous boot.
5.4.1.1 IVA2.2 Boot Configuration
Figure 5-25 shows the boot sequence followed by IVA2 on release from reset.
Figure 5-25. IVA2 Boot Mode Configuration
When the IVA2.2 subsystem is released from reset and CONTROL.CONTROL_IVA2_BOOTMOD[3:0]
BootMode equals 0x0, the first fetch address of the C64x equals the address defined in the
CONTROL.CONTROL_IVA2_BOOTADDR[31:10] BOOTLOADADDR bit field. This address can be
aligned on any 1-K byte boundary, in ROM, in IVA2.2 local RAM, in on-chip memory (OCM-RAM), or
directly in external memory (for example, SDRAM through the SDRC).
When the IVA2.2 subsystem is released from reset and CONTROL.CONTROL_IVA2_BOOTMOD[3:0]
BOOTMODE is different from 0x0, the first fetch address of the C64x is fixed to 0x007E0000 (in IVA2.2
local ROM). ROM code boot loader configuration is detailed in
Table 5-9 .
Table 5-9. Boot Loader Configuration
Value of Description
SYSC_IVA2_BOOTMOD
0x01 IDLE Boot: Boot loader configures the PDCCMD and then executes the IDLE instruction. See
Section 5.4.1.1.1 .
0x02 Wait in self-loop mode: Boot loader puts IVA2.2 in a self-loop. See Section 5.4.1.1.2 .
0x03 Cache Config Mode: Boot loader configures the L1P, L1D, L2 caches and the MAR register. See
Section 5.4.1.1.3 .
0x04 User defined bootstrap mode: Boot loader copies the boot strap into L2 memory and branches to it. See
Section 5.4.1.1.4 .
0x05 Reserved.
744 IVA2.2 Subsystem SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated