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MMU Integration
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The IVA2.2 MMU instance has only one clock domain: the functional clock domain for the MMU. The IVA
MMU clock is generated by the DPLL2 embedded in IVA2.2, but controlled by PRCM registers.
15.2.2 Power Management
The device functional units are grouped into power domains. Each power domain is a section of the
device with independent and dedicated power rails. Fifteen different power domains exist. For information
about the device power management, see
, Power, Reset, and Clock Management.
The MMU instances belong to different power domains.
shows the correspondence between
the MMU instance and power domains.
Table 15-1. Power Domains of the MMU Instances
MMU Instance
Power Domain
MMU1 (camera MMU)
CAM
MMU2 (IVA2.2 MMU)
IVA2
15.2.2.1 System Power Management
As part of the device system-wide power management scheme, each MMU instance supports a
communication protocol with the PRCM module that allows the PRCM module to request an MMU
instance to enter a low-power state. When the MMU instance acknowledges a low-power mode request
from the PRCM module, the clock to the instance is gated off at the PRCM clock generator. Because the
clock is disabled at the source, the low-power mode offers lower power consumption than the internal
clock gating method in the local power management.
The MMU instance can be configured through the MMUn.
[4:3] IDLEMODE field as one
of the following acknowledgement modes:
•
No-idle mode: The MMU instance never enters the idle state.
•
Force-idle mode: The MMU instance immediately enters the idle state after receiving a low-power
mode request from the PRCM module. In this mode, the software must ensure that there are no
pending interrupts before requesting this mode to go into the idle state; otherwise, an error can occur.
•
Smart-idle mode: After receiving a low-power mode request from the PRCM module, the MMU
instance enters the idle state only after all interrupts are acknowledged.
describes the MMU power management modes. For details, see the
register.
Table 15-2. Power Domains of the MMU Instances
Power Management Mode Requested by the PRCM
[4:3] IDLEMODE field
Force-idle
00
No-idle
01
Smart-idle
10
Reserved
11
15.2.2.2 Module Power Saving
To conserve power, the MMU instance supports an automatic idle mode whenever activity is not detected
on the configuration register port of the MMU instance. The automatic idle mode is enabled or disabled
through the MMUn.
[0] AUTOIDLE bit.
If the MMUn.
[0] AUTOIDLE bit is asserted, the automatic idle mode is enabled when
activity is not detected on the configuration register port, and the MMU instance clock is disabled internally
to the module, thereby reducing power consumption.
When new activity is detected on the configuration register port, the clock is restarted with no latency
penalty. After reset, the automatic idle mode is disabled; therefore, it is recommended to enable the
automatic idle mode to reduce power consumption.
2666
Memory Management Units
SWPU177N – December 2009 – Revised November 2010
Copyright © 2009–2010, Texas Instruments Incorporated
Содержание OMAP36 Series
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