Texas Instruments OMAP36 Series, Техническое справочное руководство

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SCM Functional Description
Table 13-55. Internal Signals Multiplexed on WKUPOBSMUX7
Pin Name Observed Signal Name WKUPOBSMU Description High State Low State
X7 Field
CONTROL. CO
NTROL_WKUP
_DEBOBS_1 [2
8:24] (dec)
hw_dbg7
(1)
CORE_OBSMUX7 0 Signal multiplexed by OBSMUX7. – –
Reserved 1 – – –
PRCM_IVA2_RST1 2 Reset signal 1 for IVA2. Reset is not Reset is
active
active
PRCM_WKUP_RST 3 Reset signal for WKUP domain. Reset is not Reset is
active
active
PRCM_ICEPICK_RST 4 Reset signal for ICEPICK module. Reset is not Reset is
active
active
PRCM_IVA2_domainWake 5 Indicates that a wake-up condition is Conditions Conditions
up detected for the IVA2 domain. reached not reached
PRCM_usbhost_domain_is 6 Indicates whether the USBHOST domain is Domain is Domain is
_inactive active or not. inactive active
PRCM_usbhost_domain_is 7 Indicates to the global Power Manager FSM State is State is not
_retention that the USBHOST domain power state is RETENTIO RETENTIO
RETENTION. N N
PRCM_usbhost_domain_is 8 Indicates to the global Power Manager FSM State is State is not
_off that the USBHOST domain power state is OFF OFF
OFF.
Reserved 9 – – –
PRCM_SRAMALLOFF[0] 10 Signal is asserted by the PRM when the State is State is not
device enters in OFF mode(bit 0). OFF OFF
PRCM_IVA2_POWER_ON 11 IVA2 switch command for power-on. Power is Power is
ON OFF
PRCM_IVA2_SRAMRETO 12 SRAM retention on signal to IVA2 power Retention is Retention is
NIN[0] domain (bit 0). ON OFF
PRCM_CORE_SRAMAONI 13 SRAM array power control input (bit 1) for Array is Array is not
N[1] CORE power domain. powered powered
PRCM_CORE_SRAMRET 14 Indicates whether the SRAM retention Power is Power is
GOODOUT[1] banks in the CORE domain are stable (bit stable not stable
1).
PRCM_SGX_SRAMRETG 15 Indicates whether the SRAM retention Power is Power is
OODOUT[0] banks in the SGX domain are stable (bit 0). stable not stable
PRCM_CAM_SRAMAGOO 16 CAM array Powergood indication from Power is Power is
DOUT[0] SRAM to PSCON (bit 0). stable not stable
PRCM_DPLL2_POWER_G 17 Indicates whether the DPLL2 power Power is Power is
OOD[0] switches status (bit 0). stable not stable
PRCM_PER_SRAMAGOO 18 PER array Powergood indication from Power is Power is
DOUT[0] SRAM to PSCON (bit 0). stable not stable
Reserved for non-GP 19 Reserved for non-GP devices . Detection Detection
devices possible impossible
PRCM_USBHS_SWAKEU 20 USBOTGHS asserts this signal to initiate a Transition Wakeup
P transition to WAKEUP mode. initiated conditions
not reached
Reserved (31:21) – – –
(1)
Mode 5 in MUXMODE0 field CONTROL.CONTROL_PADCONF_CAM_D5[2:0]
2511 SWPU177N – December 2009 – Revised November 2010 System Control Module
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