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9.3.5.2 L4 Target Agent (L4 TA)
This section provides information on the L4 Target agent (TA) register module. Each of the registers within
the module instance is described seperatly in
Table 9-153 to Table 9-177 .
Table 9-153 to Table 9-178 provide information on the L4 Target Agent having two supplementary
registers OCP_CONTROL and OCP_STATUS
The TA register block consists of the status and control registers that can be used to configure the
interfaces of the targets.
Table 9-153. CORE_TA Common Register Summary
Register Name Type Register CORE_TA_CONTROL
Width (Bits) Physical Address
L4_TA_COMPONENT_L R 32 0x4800 3000
L4_TA_COMPONENT_H R 32 0x4800 3004
L4_TA_CORE_L R 32 0x4800 3018
L4_TA_CORE_H R 32 0x4800 301C
L4_TA_AGENT_CONTROL_L RW 32 0x4800 3020
L4_TA_AGENT_CONTROL_H RW 32 0x4800 3024
L4_TA_AGENT_STATUS_L RW 32 0x4800 3028
L4_TA_AGENT_STATUS_H RW 32 0x4800 302C
Table 9-154. CORE_TA Common Register Summary
Register Name Type Register CORE_TA_CM CORE_TA_DISPLAY_SS CORE_TA_SDMA
Width Physical Physical Physical
(Bits) Address Address Address
L4_TA_COMPONENT_L R 32 0x4802 7000 0x4805 1000 0x4805 7000
L4_TA_COMPONENT_H R 32 0x4802 7004 0x4805 1004 0x4805 7004
L4_TA_CORE_L R 32 0x4802 7018 0x4805 1018 0x4805 7018
L4_TA_CORE_H R 32 0x4802 701C 0x4805 101C 0x4805 701C
L4_TA_AGENT_CONTROL_L RW 32 0x4802 7020 0x4805 1020 0x4805 7020
L4_TA_AGENT_CONTROL_H RW 32 0x4802 7024 0x4805 1024 0x4805 7024
L4_TA_AGENT_STATUS_L RW 32 0x4802 7028 0x4805 1028 0x4805 7028
L4_TA_AGENT_STATUS_H RW 32 0x4802 702C 0x4805 102C 0x4805 702C
Table 9-155. CORE_TA Common Register Summary
Register Name Type Register CORE_TA_I2C3
Width Physical
(Bits) Address
L4_TA_COMPONENT_L R 32 0x4806 1000
L4_TA_COMPONENT_H R 32 0x4806 1004
L4_TA_CORE_L R 32 0x4806 1018
L4_TA_CORE_H R 32 0x4806 101C
L4_TA_AGENT_CONTROL_L RW 32 0x4806 1020
L4_TA_AGENT_CONTROL_H RW 32 0x4806 1024
L4_TA_AGENT_STATUS_L RW 32 0x4806 1028
L4_TA_AGENT_STATUS_H RW 32 0x4806 102C
Table 9-156. CORE_TA Common Register Summary
Register Name Type Register CORE_TA_USB_TLL CORE_TA_USB_HS_Host CORE_TA_UART1
Width Physical Physical Physical
(Bits) Address Address Address
L4_TA_COMPONENT_L R 32 0x4806 3000 0x4806 5000 0x4806 B000
2086 Interconnect SWPU177N – December 2009 – Revised November 2010
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