Texas Instruments OMAP36 Series, Техническое справочное руководство

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IVA2.2 Subsystem Basic Programming Model
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• Initialization: Parameters that remain constant throughout the encoding process are written into
registers.
• Processing: The iVLCD is run as many times as necessary to encode the data. The VLC module
operates on an N macroblocks basis. This means that each time VLC is triggered, exactly N blocks of
64 elements are encoded. N must be specified to the encoder by setting the corresponding bits in the
iVLCD control registers. Because N generally remains constant during encoding, it is set during
initialization. During processing, some registers set during initialization can be modified by the
application or are modified by the VLC between the times it is run.
To perform the correct encoding operation, the IVA. VLCD_MODE register must have bits set to the
correct values. By setting the following bits, the iVLCD coprocessor enables great flexibility, letting the
programmer choose the type of encoded data format and the number of macroblocks encoded at a time:
•
IVA. VLCD_MODE [2:0] FUNC field: Determines the VLC encode function: Value, 000 for Q, 001 for IQ,
010 for VLC, 011 for VLD, 100 for Q + IQ, 101 for Q + VLC, 110 for Q + IQ + VLC, 111 for VLD + IQ
• IVA. VLCD_MODE [7] MPEGINTRA bit: Determines whether the blocks to be encoded are intra
macroblocks for MPEG encoding. For JPEG, this bit must be set to 1.
• IVA. VLCD_MODE [11] JPEGSYNC bit: Determines whether to insert the code 00 in the bitstream after
getting a byte-aligned code of FF. Setting this bit to 1 activates 00 insertion. This bit must be set to 1
for JPEG.
• IVA. VLCD_MODE [14:12] NUMBLKS field: Specify the number of blocks of 64 elements to be
processed each time the VLC coprocessor is triggered. Each block element is a 16-bit word and a
maximum of 6 blocks can be encoded at once.
• IVA. VLCD_MODE [10] MPEGTYPE bit: Holds the value for MPEG picture coding type
• IVA. VLCD_MODE [8] INTRAVLC bit inMODE register: Specifies intra VLD decoding for MPEG modes:
0, use INTRA DC VLC table; 1, switch to INTRA AC VLC table.
• IVA. VLCD_MODE [6:4] MODESEL field: Tell the iVLCD what type of image coding is used: Value 000
for JPEG, 001 for MPEG1, 010 for MPEG2, 011 for H.263, 100 for MPEG4, 101 for MPEG4 data
partition, 110 for MPEG4 RVLC/D, and value 111 is reserved.
• IVA. VLCD_VLCDIN_ADDR input address register:
• IVA. VLCD_VLCDOUT_ADDR output address register: Because the bit size of a codeword can be
other than 16 bits, the bitstream buffer pointer register alone is not sufficient to determine the precise
location of the next codeword to be written in the bitstream. To get the complete location, the next
register must be used.
• IVA. VLCD_BITS_BPTR bits pointer register: Must contain a 4-bit value between 0 and 15 that is the bit
position in the starting word of the bitstream. Because the VLC fills a codeword from the MSB to the
LSB, this register is generally set to 15 at the beginning. After each run, the VLC updates the register
by writing the bit position of the next codeword.
• IVA. VLCD_RING_START ring buffer start address register:
• IVA. VLCD_RING_END ring buffer end address register:
• IVA. VLCD_HUFFTAB_DCY Huffman DC Y table base address register: Holds the pointer to the
Huffman table for luminance DC coefficients. The address is relative to the base address of the iVLCD
Huffman table memory and must be 32-bit-aligned.
• IVA. VLCD_HUFFTAB_DCUV Huffman DC UV table base address register: Holds the pointer to the
Huffman table for chrominance DC coefficients. The address is relative to the base address of the
iVLCD Huffman table memory and must be 32-bit-aligned.
• IVA. VLCD_HUFFTAB_ACi (i = 0) Huffman AC0 table base address register: Holds the pointer to the
Huffman table for luminance AC coefficients. The address is relative to the base address of the iVLCD
Huffman table memory and must be 32-bit-aligned.
• IVA. VLCD_HUFFTAB_ACi (i = 1) Huffman AC1 table base address register: Holds the pointer to the
Huffman table for chrominance AC coefficients. The address is relative to the base address of the
iVLCD Huffman table memory and must be 32-bit-aligned.
• IVA. VLCD_LUMA_VECTOR LUMA bit-vector register: States which blocks must be treated as
luminance blocks. This information is necessary because the Huffman table differs from luminance to
chrominance data. For a complete description of this register, see
Section 5.5 , IVA2.2 Subsystem
Register Manual.
• IVA. VLCD_MPEG_CBP MPEG coded block pattern register: Specifies which 8x8 blocks of each
776 IVA2.2 Subsystem SWPU177N – December 2009 – Revised November 2010
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