Texas Instruments OMAP36 Series, Technical Reference Manual

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Display Subsystem Register Manual
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Table 7-211. Register Call Summary for Register DISPC_VIDn_FIR
Display Subsystem Basic Programming Model
• Display Controller Basic Programming Model : [0]
• Video Configuration Register : [1]
• Video Up-/Down-Sampling Configuration : [2] [3]
Display Subsystem Use Cases and Tips
• Register List : [4]
• Factor : [5] [6]
• Coefficients : [7] [8] [9] [10]
Display Subsystem Register Manual
• Display Controller VID1 Register Mapping Summary : [11]
• Display Controller VID2 Register Mapping Summary : [12]
Table 7-212. DISPC_VIDn_PICTURE_SIZE
Address Offset 0x0E4+ ((–1)* 0x90) Index n = 1 for VID1 or 2 for VID2
Physical address 0x4805 04E4+ ((–1)* 0x90) Instance DISC
Description The register configures the size of the video picture associated with video layer #nbefore up-/down-scaling.
Shadow register, updated on VFP start period or EVSYNC.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved VIDORGSIZEY Reserved VIDORGSIZEX
Bits Field Name Description Type Reset
31:27 Reserved Write 0s for future compatibility. RW 0x00
Read returns 0
26:16 VIDORGSIZEY Number of lines of the video picture RW 0x000
Encoded value (from 1 to 2048) to specify the number of lines of the
video picture in memory (program to value minus one).
15:11 Reserved Write 0s for future compatibility. RW 0x00
Read returns 0
10:0 VIDORGSIZEX Number of pixels of the video picture RW 0x000
Encoded value (from 1 to 2048) to specify the number of pixels of the
video picture in memory (program to value minus one). The size is
limited to the size of the line buffer of the vertical sampling block in
case the video picture is processed by the vertical filtering unit.
(1)
(1)
For 5-tap RGB16 and YUV422 picture formats, the width of the input picture must be a multiple of 2 pixels and more than 5 pixels. This
leads to the following register configuration:
•
DISPC_VIDn_ATTRIBUTES [21] VIDVERTICALTAPS is set to 1.
• DISPC_VIDn_PICTURE_SIZE [10:0] VIDORGSIZEX must be even and more than 4.
Table 7-213. Register Call Summary for Register DISPC_VIDn_PICTURE_SIZE
Display Subsystem Functional Description
• Up-/Down-Sampling : [0]
Display Subsystem Basic Programming Model
• Display Controller Basic Programming Model : [1]
• Video DMA Registers : [2] [3] [4]
• Video Configuration Register : [5]
• Video Window Attributes : [6] [7]
• Video Up-/Down-Sampling Configuration : [8]
Display Subsystem Use Cases and Tips
• Vertical Filtering : [9]
Display Subsystem Register Manual
• Display Controller VID1 Register Mapping Summary : [10]
• Display Controller VID2 Register Mapping Summary : [11]
• Display Controller Registers : [12]
1858Display Subsystem SWPU177N – December 2009 – Revised November 2010
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